Parallel and Distributed Systems Group

Computer Science Department of Telecom SudParis

SpeedyLoader: Efficient Pipelining of Data Preprocessing and Machine Learning Training

Invited talk: Stella Bitchebe will present "SpeedyLoader: Efficient Pipelining of Data Preprocessing and Machine Learning Training" at 4A312 (visio link) the 26/3/2025 at 14h00.

Bio

Stella is a postdoctoral researcher at McGill University in Canada, working at the DISCS Lab with Professor Oana Balmau. Her main research axes are Operating Systems and Machine Learning (ML). With a background in Systems and a recent interest in ML, she currently works at their intersection, proposing systems-level optimizations for ML frameworks and algorithms. She obtained her Ph.D. in France under the supervision of Professor Alain Tchana, at the i3S Laboratory of the Côte d’Azur University at Sophia Antipolis. Her Ph.D. research mainly focused on Operating Systems and Hardware Virtualization. She proposed a novel virtualization research axis called "OoH: Out of Hypervisor." Instead of emulating full virtual hardware inside a virtual machine (VM) to support a hypervisor, the OoH principle is to individually expose current hypervisor-oriented hardware virtualization features to the guest OS. Stella is also particularly committed to promoting STEM in general, particularly computer science, to young females (both high school and university students). Her notable activities in that field include the Women in Computer Science workshop (WoCC) that she has been organizing in Cameroon for the past three years. WoCC seeks to expose aspiring women scientists to women’s accomplishments worldwide in computer science research.